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1 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 may 2 nd , 201 4 automotive grade auirs20302s pre - regulated t hree phase gate d river features ? 3 phase gate driver for 24v & higher drives ? under - voltage lockout for all channels ? cro ss- conduction prevention logic ? high voltage pre - reg ulator mosfet ? power - on reset architecture ? fault detection and reset ? current sense comparator ? over - current blanking time ? 3.3v logic compatible ? matched propagation delay for all channels ? fully operational u p to +200v ? floating ch annels for bootstrap operation ? high negative transients immunity ? pre - regulated supply line for up ? automotive qualified ? leadfree, rosh compliant typical applications 24v to 150 v ? 3 phase motor drives automotive & truck h vac, pump bldc motor drives typical connection diagram product summary topology 3 - phase gate driver v offset 200 v v out 8.0 v ? 17 v i o+ & i o - (typical) 0.20 a & 0.35 a t on & t off (typical) 530 ns / 530 ns deadtime (typical) 0.7 us packa ge soic 28wb + bat - bat u v w aui rs20302s vpr vcp vb1 lin1 vb2 vs1 vs2 vs3 ho1 ho2 ho3 lo1 lo2 lo3 cap com can vss ref 5v reg asic or up lin2 lin3 hin1 hin2 hin3 flt frst en vb3
auirs20302s 2 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 table of contents page typical connection diagram 1 description /feature comparison 3 qualification information 4 absolute maximum ratings 5 recommended operat ing conditions 5 static electrical characteristics 6 dynamic electrical characteristics 7 functional block diagram 8 input/output pin equivalent circuit diagram 9 lead definitions 10 lead assignments 10 application information and additional detail s 11 parameter temperature trends 1 6 package details 21 tape and reel details 22 part marking information & ordering information 23
auirs20302s 3 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 description the auirs20302s is a three phase gate driver dedicated to bldc motor driv e up to 600w. proprietary hvi c technology enables this rugged monolithic design with enforced automotive esd & latch - up grades. pri marily designed for 24v battery application, its drive capability goes from 12v to 200v which cover all the abnormal conditions of the vehicle. the gate d rive circuitry features cross - conduction preventive and minimum dead - time blocks. it is powered by a constant voltag e so that the gate drives nev er exceed 17v including during load dump condition. an external mosfet is acting as a pre - regulator. the inne r charge pump and voltage control loop drive s its gate in order to keep the vpr pin constant when the battery voltage varies . the auirs20302s also features an ov er - current protection that definitively shut s down all gates in case of short - circuit. t he faul t condition is reset by cycling the frst pin while the i.c is disabled. a blanking time , synchronized with each high side switch command, avoid s any premature triggering of the protection. the logic control block of the auirs20302s is developed in order t o support a fast and reliable 3 phase bldc design. for example, its inputs are compatible with the 3.3v logic processors and feature a short - pulse/ noise rejection filter. the 6 commands include matched propagation delays , shoot - through protections and min imum dead- time . the bootstrap capacitor voltage of each phase is monitored independently (uvlo) . also , the maximum gate voltage is controlled by the pre - regulator in all conditions. no linear or abnormal gate drive is possible. the vpr pin can also supply t he surrounding system components if the total consumption doesn?t exceed 0.1a.
auirs20302s 4 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 qualification information ? qualification level automotive (per aec - q100 ?? ) comments: this family of ics has passed an automotive qualification. ir?s industrial and consu mer qualification level is granted by extension of the higher automotive level. moisture sensitivity level soic28 msl3 ??? 260c (per ipc/jedec j - std - 020) esd machine model m1 (+/ - 200v) (per aec - q100 - 003) human body model h1b (+/ - 2000v) ( per aec - q100 - 00 2 ) charged device model c3b (+/ - 500 v ) (per aec - q100 - 011) ic latch - up test class ii level a (per aec - q100 - 004) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http:// www.irf.com/ ?? exceptions to aec - q100 requirements are noted in the qualification report. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information.
auirs20302s 5 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are a bsolute voltages referenced to vss, all cu rrent s are defined positive into any lead. an operation above the absolute maximum limit is not implied and could damage the part. the thermal resistance and power dissipation ratings are measured under board m ounted and free air conditions symbol definition min. max. units v b1,2,3 high side floati ng supply voltage - 0.3 220 v v ho1,2,3 high side floating output voltage v s1,2,3 - 0.3 v b 1,2,3 + 0.3 v s1,2,3 high side offset voltage v b 1,2,3 - 20 v b 1,2,3 + 0.3 vpr low side supply voltage - 0.3 17 vcp charge pu mp output voltage - 0.3 17 com powe r ground - 5 5 v lo1,2,3 , / flt low side output voltage lo# ; flt pin - 0.3 vpr + 0.3 v in input pin voltage (lin#, hin#, ) - 0.3 vpr + 0.3 can/cap over - current comparator inputs - 0.3 vpr + 0.3 en/frst enable & fault reset inputs - 0.3 vpr + 0.3 dv/dt hi gh side floating voltage slew rate ? 50 v/ns rth ja j unction to am bient thermal resistance ? 80 c/w t j maximum operating j unction temperature 150 c t s maximum s torage temperature - 55 150 t reflow reflow max. temperature ( 60 sec. ) ? 2 60 recommended operating conditions the input/output timing diagram is shown in figure 1. for proper operation the device should be used within the recommended c onditions. all voltage parameters are referenced to vss. the vs & com offset rating are te sted with all supplies biased at 15v differential. symbol definition min. max. units v b1,2,3 high side floating supply voltage v s1,2,3 +6 v s1,2,3 +19 v v ho 1,2,3 high side output voltage ho# v s1,2,3 - 0.3 v b1,2,3 +0.3 v s 1,2,3 high side floating supply voltage ( note 1 ) 200 vpr low side supply voltage 6 17 v lo1,2,3 low side output voltage lo# - 0.3 vpr+0.3 com power ground - 5 5 v ho1,2,3 high side output voltage v s1,2,3 v b1,2,3 v lo1,2,3 low side output voltage com vpr v in logic input voltag e lin, hin, en, cap, can, frst v ss - 0.3 vpr vcan/cap common mode voltage on the can & cap inputs 0 5 vcp charge pump output voltage - 15 note 1: logic operational for v s between com - 5v to com +200v. logic state held for v s of com - 5 to com ? v bs. (please refer to the design tip dt97 - 3 for more details).
auirs20302s 6 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 static electrical characteristics u nless otherwise noted , these specifications apply for an operating junction temperature range of - 40 c tj 125 c with bias conditions of vbias ( vpr,vbs 1,2,3) = 15v. the vin , vth and in parameters are referenced to vss and are applicable to all six channels (hs 1,2,3 and ls 1,2,3). the vo and io parameters are referenced to com and vs 1,2,3 and are applicable to the respective output leads: lo1,2,3 and ho1,2,3. symbol definition min typ max units test conditions vin,th+ input positive going threshold (hin#, lin#, en, frst) - 1.9 2.5 v vin,th - input negative going threshold (hin#, lin #, en, frst) 0,7 1 - iin+ input bias current (lin#, hin #, en, frst) 15 100 220 a vin=5v iin - input bias current (lin#, hin#, en, frst) - 1 0 1 vin=0v vpr,uvth+ vpr supply undervoltage positive going threshold (note 2) 6.4 7.2 8,2 v vpr,uvth - vpr supply undervoltage negative going threshold (note 2) 6 6.7 7. 6 vpr,uvhys vpr supply undervoltage hysteresis (note 2) 0.4 0.5 0.7 vbs, uvth+ vbs supply undervoltage positive going threshold 6.4 7.2 8,2 vbs, uvth - vbs supply undervoltage negative going threshold 6 6.7 7.6 vbs, uvhys vbs supply undervoltage hysteresis 0.4 0.5 0.7 i lk offset supply leakage current - 5 50 a vb=vs=200v iqbs quiescent vbs supply current 20 45 120 iqpr quiescent vpr supply current 1 2,5 5 ma vpr=14v v oh high level output voltage, vpr ? vo, ho# 0,2 0.9 1.4 v io =20ma v ol low level output voltage, vo, ho# 0,05 0.2 0.6 io+ output high short circuit pulsed current , ho# ,lo# 105 200 450 ma vo =0v, pw 10 s io - output low short circuit pulsed current, ho# ,lo# 210 350 650 ma vo =15 v, pw 10 s vcp charge pump output voltage vpr=4v 5 6 7,5 v r ext =100k vpr=8v 10 13 15 vpr=9v 13 15 17 vpr=14v 13 15 17 icp+ charge pump source current v pr=6v 100 200 400 a vpr=14v 200 500 1000 icp - charge pump sink current - 5 10 ma vcl_vcp vcp pin active clamp 17 18.6 21 icp=10ma v flt flt low output voltage - - 0.8 v i flt = 10ma ican 1 comparator input high bias current - - 7 a can=5v ica n 0 comparator input low bias current - - 7 can=0v voff comparator input offset - 33 - 3 3 mv vcap= 5v tfrst minimum fault reset time 20 - - us ton_en minimum enable time 20 - - us (note 2): . uvpr is latched; when vpr>uvpr, fault remains pulled down. t his leads to have the fault active and latched at vpr ramp up if no fault reset occurs.
auirs20302s 7 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 dynamic electrical characteristics unless otherwise noted, these specifications apply for an operating junction temperature range of - 40 c tj 125 c with bias con ditions of vpr = vbs = 15v, vs1,2,3 = vss = com, and cl = 1000 pf. symbol definition min typ max units test conditions ton turn - on propagation delay, lo#, ho# 350 550 850 ns v in = 0 & 5v toff turn - off propagation delay, lo#, ho# 350 600 850 lot r , h ot r turn - on rise time lo#, ho# 10 100 300 lot f , hot r turn - off fall time lo#, ho# 5 35 75 t oc over - current to output shutdown response time - 1 1.7 us v (can) - v (cap) =1v t flt over - current flt response time - 0.7 1.2 t blank current limit blankin g time 5 6 7.5 tfilin input filter time (hin, lin) 200 270 510 ns v in = 0 & 5v dt dead - time 420 700 1000 vpr=1 5 v truth table this table is valid for voltages ranges defined in the recommended operating conditions section. enable can>ca p frst lin # / hin # lo # /ho # flt comments 0 0 0 x 0 no change flt keeps showing same status 0 1 0 x 0 vss 0 0 1 x 0 open flt reset sequence (note3) 0 1 1 x 0 vss 1 0 x lin#/hin# lo#/ho# open normal operation : a n anti - shoot - through logic prevents each channel from turning on simultaneously the hs and ls switches 1 1 0 lin#/hin# 0 vss over - current detection (flt) 1 * 1 * 1 * lin#/hin# * lo#/ho# * open* * not recommended (cycling on default) note 3: the proper sequence to reset the fault latch is to first set en at 0v and then cycle the frst pin. the gate drives return to normal operation when en is set again at 5v.
auirs20302s 8 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 functional block diagram lin1 en hin1 hin2 hin3 lin2 lin3 deadtime & shoot - through protection hv level shifter latch & undervoltage detection driver vb1 ho1 vs1 driver lo1 deadtime & shoot - through protection hv level shifter latch & undervoltage detection driver vb2 ho2 vs2 driver lo2 deadtime & shoot - through protection hv level shifter latch & undervoltage detection driver vb3 ho3 vs3 driver lo3 over - current blanking time + _ cap can logic control vpr pre - regulation control vcp com vss q r s fault latch frst flt vcc
auirs20302s 9 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 input/output pin equivalent circuit diagram
auirs20302s 10 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 lead definitions symbol description hin# input for high side gate drive ? active high lin# input for low side gate drive ? active high vss logic g round vc p pre - regulated mosfet gate output ? analog gate drive vpr power supply pin of the i.c (equivalent to vcc) lo# low side gate driver outputs (1,2 & 3) com common low side gate drive return pin & power ground cap non inverting input of the over - current comparator can inverting input of the over - current comparator vs# high side floating supply return (1, 2 & 3) ho# high side gate driver outputs (1, 2 & 3) vb# high side floating supply (1, 2 & 3) en en able input ? active high fault fault output pin ? open collector frst fault reset input pin ? active high lead assignm ents
auirs20302s 11 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 application information and additional details input short - pulse / noise rejection filter the inputs of this i.c are compatible with cmos and ttl standards. the auirs2030 2s has been designed i n order to also interface the 3. 3v logic signals. the vin th+ and vin th - thresholds of the input schmitt trigger were se t to 1.9v and 1v (typical) . figure #1 shows the inner logic signal versus the input profile. figure 1: input thresholds figure 2: input filter a filter is then implemented just after the schmitt trigger on every input pin. hin & lin feature a 270 ns filter (typical) while frst & en have a 50 ns one. its principle greatly improves t he input/output pulse symmetry as well as helps reject noise spikes. the behaviour of the input filters is presented in the figure #2. the parameter tfilin represents the minimum pulse duration to pass the filter. logic control block this block centraliz es all the logic signals in order to: generate the proper outputs drives with minimum dead - time insertion, prevent shoot - through sequences, blank premature triggering of the short - circuit comparator and reset the fault flag. the enable pin (en) switches of f all outputs immediately in case of an urgent system request. it actually can be used to cycle the gate s. the figure #3 shows all the signals timing. figure 3: input/output timing diagram
auirs20302s 12 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 the auirs20302s features an embedded dead - time circuitry. it inserts a minimum time period in which both the high and low side switches are forced off. by this mean and for each leg, each power switch is fully off before the next one turns on. this dead - time is automatically inserted by the auirs20302s including when the command sequence does include a shorter dt. sequences with larger dead - time are not affected by the driver. figure s # 4 & 5 show the dead - time principle and timing on the outputs. the dead - times are matched not only for each leg (high side / low s ide matching) but also among the three legs. figure 4: dead - time principle figure 5: output timing (dead - time) protection blanking time & fault reset sequence the can and cap pins are intended to interface a shunt. in cas e of over - current protection (can>cap), the flt pin and all the gates are pulled down. there is a blanking time circuitry on the over - current protection. the comparator output is ignored for (t blank ) s after each hinx rising edge. the fault reset is achie ved by the following sequence: a) force en pin to gnd and b) cycle the frst pin for the recommended minimum time (t frst ). then, p ulling - up again the en pin resume s normal operation. figure #6 shows the fault and output sequences while figure #7 emphasizes the reset sequence. figure 6: fault/output after sc figure 7: fault reset sequence pre - regulated vpr voltage the auirs20302 s features a pre - regulated supply in order to maintain reasonable gate voltages in all conditions. th is circuitry is composed of a vco controlled charge pump, a comparator and a protective active clamp . th o se three blocks were specifically designed in order to minimize the ir emi contribution to the whole system. th e mosfet gate is regulated at 15v. depend ing on the mosfet gate threshold, vpr is then stabilized at ?? vcp ? vt ?? which usually ends up between 12v and 13.5 v. a high er vpr voltage is achievable by using a logic level mosfet . the gate voltage and the charge pump output are protected by a 17v cl amp. the figure #8 presents the block diagram of the pre - regulator circuitry with the 100k resistor needed between the gate and the drain of the mosfet.
auirs20302s 13 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 8: pre - regulator block diagram during the power - up sequ ence, the gate is biased thanks to the 100k resistor connected to its drain. when vbat exceeds 4v, the charge pump output is already close to the mosfet gate threshold. at 6v, vcp is typically higher than 9 v (see vcp values ? page 5 ? static electrical character istics). so, during vbat ramp - up, the mosfet is first biased by the resistor until the charge pump overcomes the gate voltage and turns it fully on . as vbat keeps increasing, the mosfet remains fully on until the voltage closed loop enters the linear mode to control and stabilize vcp at 15v. pre - regulator mosfet drive the stabilized vpr voltage supplies the i.c and the bootstrap diodes thus the mosfet power dissipation is quite low. it can also supply the system components. in that case, the power mosfet dissipation has to be evaluated carefully and the implementation of an extra heat - sink considered. in s ome applications, it may be necessary to know at what exact voltage the charge pump overcomes the resistive bias of the pre - regulator mosfet . this voltag e depends on the total moseft drain current (iqpr + system consumption). for example, t he system intelligence may include a regulator whose voltage drop influences the minim um operation voltage . i f we consider the voltage drop of a 5v regulator at 0.8v, wh at is the status of the pre - regulator mosfet when vbat passes 5,8v ( already fully on or still in the source follower mode )? figure #9 summarizes the procedure to evaluate the exact vbat voltage at which the pre - regulator mosfet is turned fully on by the charge pump. it is a 4 steps procedure where ?? i load ?? represents the quiescent current of the i. c plus the system consumption (in the voltage range considered ) . looking to the mosfet characteristic at the specific ?? i l oad ?? drain current point gives the corresponding vgs value. the mosfet will be fully on when the vcp pin exceed s this vgs value. the charge pump characterization is then used to determine the exact vpr voltage at which the quantity ??vc p - vpr?? exactly equals the identified vg s. f inally , from the vpr value , the corresponding vcp voltage ref charge pump vco vcp vss - + active clamp vcp voltage control loop vpr vcc + bat system intelligence vcp comparator 100k 1.1m 2.2m
auirs20302s 14 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 is extracted again from the charge pump characterization. at this point of operation, the vcp voltage equa ls the vbat potential at which the mosfet becomes fully on (no voltage drop across the biasing res istor in this mode). figure 9: the 4 step procedure pcb recommendations the pcb is designed in order to minimize the gate drive wires, make the power topology up to 15a continuous capable and have the shunt interface as short as possible. also, ground star connection is located at the bottom of the shunt. figure 10: component face layout figure 11: solder face layout
auirs20302s 15 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 the following schematic is an example of the auirs20302s application. it is a 100w - 24v bldc motor drive for an actuator. the power mosfets and the pre - regulator are designed in order to pass the 60v truck load dump condition. the system intelligence is powered via a 5v regulator connected to the vpr pin. title size document number rev date: sheet of auirs20302sdemoboard a3 1 1 thursday , may 06, 2010 0 d2 bav21 c2 100n /100v c11 1n c3 100n d3 bav21 tp1 1 c4 100n r1 100k r2 100k r3 100k r4 100k r5 100k c5 2.2u r6 100k r7 100k r8 1k r9 6k8 r10 10k r11 10 c6 100n r12 10 r13 10 r14 4k7 r15 4k7 tp2 1 c7 100n r16 4k7 r17 1k r18 1k 0 r19 1k r20 1k /63v r21 1k r22 1k r23 1k r24 10k r25 10k r26 10k r27 100k r28 22k vbusp r29 1k2 tp3 1 r30 0 r31 100k r32 0 r33 100k r34 0 r35 100k gnd r36 0 0 r37 100k r38 0 r39 100k r40 0 r41 100k tp4 1 r42 2k2 vcc5v vcc5v a b c tp5 1 pwm 0 tp6 1 u coms 0 0 tp7 1 ld1 tp8 1 sensor vcc hall hall a hall b hall c tp9 1 tp10 1 frequency 20khz sensor gnd hall tp11 1 tp12 1 tp13 1 v m1 irfs3607 w tp14 1 tp15 1 on 1 2 sw1 tp16 1 comppwm phase w phase v phase u vcc5v shunt r43 forward bt1 1 2 3 vcc5v enable lo1 lo2 external drive lo3 c8 100n m3 irfs3607 0 u2 irs20302s en 1 hin1 2 hin2 3 hin3 4 lin1 5 lin2 6 lin3 7 vss 8 vcp 9 vpr 10 lo1 11 lo2 12 lo3 13 com 14 nc 15 can 16 cap 17 vs3 18 ho3 19 vb3 20 vs2 21 ho2 22 vb2 23 vs1 24 ho1 25 vb1 26 flt 27 frst 28 m4 irfs3607 ho3 m5 irfs3607 ho2 bt2 1 2 3 0 lo2 m6 irfs3607 lo3 vcc5v coms m7 irfs3607 vcc5v 24v to 60v power supply 0 d4 smcj54a 1 2 ho1 u v u1 mc7805cd in 1 out 3 gnd 2 ho2 w ho3 0 ho1 lo1 m2 irfs3607 masse logic /100v c9 100n logiccpld cpld a b c p d f vss liw liv liu hlw hlv hlu vcc /100v j8p1 1 2 3 4 5 6 7 8 0 + cp1 470f c10 100n 0 modif.: r30; r32; r34; r36; r38; r40 =0 d1 bav21 c1 470n 0 figure 12: 100w ? 24v bld c application schematic
auirs20302s 16 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 13: component implementation
auirs20302s 17 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 parameter temperature trends figures illustrated in this chapter provide information on the experimental performance of the auirs 20302s hvic. the line plotted in each figu re is generated from actual lab data. a large number of individual samples were tested at three temperatures ( - 40 oc, 25 oc, and 125 oc) with supply voltage of 15v in order to generate the experimental curve. the line consists of three data points (one da ta point at each of the tested temperatures) that have been connected together to illustrate the understood trend. the individual data points on the typ. curve were determined by calculating the averaged experimental value of the parameter (for a given te mperature). figure 1 4. turn - on propagation delay vs. temperature figure 1 5. turn - off propagation delay vs. temperature figure 16 . turn - on rise time vs. temperature figure 17 . turn - off fall time vs. temperature
auirs20302s 18 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figu re 18 . input filter time vs. temperature figure 19 . current limit blanking time vs. temperature figure 20 . over current response time vs. temperature figure 21 . over current shutdown time vs. temperature
auirs20302s 19 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 22 . dead time vs. temperature figure 23 . offset leakage current vs. temperature figure 24 . quiescent vpr current vs. temperature figure 25 . quiescent vbs current vs. temperature
auirs20302s 20 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 26 . output high pulse current vs. temperature figure 27 . output low pulse current vs. temperature figure 28 . charge pump source current vs. temperature vpr = 6v figure 29 . charge pump source current vs. temperature vpr = 14v figure 30 . comparator input high current vs. temperature figure 31 . comparator input low current vs . temperature
auirs20302s 21 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 32 . vpr uv+ going threshold vs. temperature figure 33 . vpr uv - going threshold vs. temperature figure 34 . vbs uv+ going threshold vs. temperature figure 35 . vbs uv - going threshold vs. temperature
auirs20302s 22 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 figure 36 . hig h level output voltage vs. temperature io = 20ma figure 37 . low level output voltage vs. temperature io = 20ma figure 38 . flt low output voltage vs. temperature figure 39 . charge pump output voltage vs. temperature vpr = 4v figure 40 . charge p ump output voltage vs. temperature vpr = 8v figure 41 . charge pump output voltage vs. temperature vpr = 14v
auirs20302s 23 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 package details:
auirs20302s 24 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 tape and reel information
auirs20302s 25 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014
auirs20302s 26 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 part marking information auirs20302s ir logo ayww ? part number date code pin 1 identifier lot code (prod mode ? 4 digit spn code) assembly site code per scop 200-002 ? xxxx marking code lead free released non-lead free released ? p ordering information base part number package type standard pack complete part number form quantity auirs20302s soic28w tube/bulk 25 auirs20302s tape and reel 1000 auirs20302str
auirs20302s 27 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 important notice unless specifically designated f or the automotive market, international rectifier corporation and its subsidiaries (ir) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any prod uct or services without notice. part numbers designated with the ?au? prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance and process change notification. all products are sold subject to ir?s te rms and conditions of sale supplied at the time of order acknowledgment. ir warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ir?s standard warranty. testing and other quality control te chniques are used to the extent ir deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ir assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ir components. to minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards. reproduction of ir information in ir data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alterations is an unfair and deceptive business practice. ir is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ir products or serviced with statements different from or beyond the param eters stated by ir for that product or service voids all express and any implied warranties for the associated ir product or service and is an unfair and deceptive business practice. ir is not responsible or liable for any such statements. ir products ar e not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the ir product could cre ate a situation where personal injury or death may occur. should buyer purchase or use ir products for any such unintended or unauthorized application, buyer shall indemnify and hold international rectifier and its officers, employees, subsidiaries, affil iates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ir was negligent regarding the design or manufacture of the product. only products certified as military grade by the defense logistics agency (dla) of the us department of defense, are designed and manufactured to meet dla military spe cifications required by certain military, aerospace or other applications. buyers acknowledge and agree that any use of ir products not certified by dla as military - grade, in applications requiring military grade products, is solely at the buyer?s own risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ir products are neither designed nor intended for use in automotive applications or environments unless the specific ir products a re designated by ir as compliant with iso/ts 16949 requirements and bear a part number including the designation ?au?. buyers acknowledge and agree that, if they use any non - designated products in automotive applications, ir will not be responsible for an y failure to meet such requirements.
auirs20302s 28 www.irf.com ? 2014 international rectifier submit datasheet feedback may 28, 2014 revision history date comment nov 20th , 2010 dr2 format and revision (preliminary) march 14 th 2011 note 2 at page 5 modified ( ?uvpr is latched? ) and moved under st el char table. august 3 1 , 2011 added au qual ified, leadfree, rosh; revised qualification level table; added tri - temp graphs; modified part marking graph; revise notice page to the latest version. sep 13 th , 2011 abs max rat: com limits set to - 5v..5v ; max oper junc temp=150^c; static el char: voffse t min= - 33mv. fig4 and fig5 and fig6 change. sep 14 th , 2011 added au qualified, leadfree rosh; removed preliminary ; revised dt condition vpr=15v may 2 nd , 2014 update esd protection scheme on page 9, pins can and cap for technical support, please contact ir?s technical assistance center http://www.irf.com/technical - info/ world headquarters: 101 n. sepulveda blvd ., el segundo, c alifornia 90245 tel: (310) 252 - 7105

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